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timecop: i dunno just get some shit from wolfson/cirrus
oh pin compatible, fuck if i know

Posted by renesis at 23:41 | permalink | 0 comments

i gave up on finding the split
they prob overlapped frames
wait no i think i see it
like frame by frame where the water on the ramp turns upward, i kind of see a jump

Posted by renesis at 10:48 | permalink | 0 comments

is that normal?
k good that shouldnt be normal

Posted by renesis at 09:16 | permalink | 0 comments

man fuck fuck fuck fuck fuck fuck

Posted by renesis at 08:52 | permalink | 0 comments

also smash
all the things
so like, two terminals with polarity signs, and a V with a voltage associated with it
and my brain saw it as a connection to a low impedance voltage source
but thats just how he says theres 10V across the terminals, it was meant to be an open
so what i thought was a decoy current source, because any current could be sourced from the voltage source across the terminals, it was actually the *only* current source

Posted by renesis at 08:31 | permalink | 0 comments

also, wtf @ resistors without reference designators

Posted by renesis at 05:30 | permalink | 0 comments


Posted by renesis at 05:18 | permalink | 0 comments

no thats my solution to spaghetti circuits of resistors and dependent sources
i think what i was supposed to do was KCL currents into two branches, and then relate all the cururents together
but it took my like 10min to realize there was a current source in a series branch that was kind of start point
rab_: i do constantly but hundreds of schematics at work, i dont think ive ever seen ideal current sources or dependent ideal current and voltage sources
also random upside down voltages and backwards currents
i think i clicked over to maximum dyslexia

Posted by renesis at 05:03 | permalink | 0 comments

man fucked, i just did not so great on a KVL/KCL quiz
about halfway through '30 seconds in LTspice' started looping in my head

Posted by renesis at 04:52 | permalink | 0 comments

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