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stupid posts are stupid

Posted by renesis at 14:41 | permalink | 0 comments

almost time for au gp qualy

Posted by renesis at 13:08 | permalink | 0 comments

yeah i think for spinny death i handled uart in main loop at lower priority
just the rx, for timer int, i had spi from angle sense, pid processing, then uart tx, with bunch of higher priority dma and interrupts

Posted by renesis at 09:15 | permalink | 0 comments

oh by mainloop i mean the timer interrupt loop because who even mainloops

Posted by renesis at 09:01 | permalink | 0 comments

blackmoon: ikr, im going to try and get a 5ms update working and run it at the of mainloop
full refresh, i want the RF immunity
oh and i guess i save few ms if i dont clear screen

Posted by renesis at 08:51 | permalink | 0 comments

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