H = hoe
Posted by renesis at 14:51 | permalink | 0 comments
lordpil's blog
if they try and build it its going to be destroyed like 100 diff ways
Posted by renesis at 09:06 | permalink | 0 comments
prob everything except L0 and F0 has it
yeah never configured or coded any of this stuff, shrug
neat
Posted by renesis at 08:06 | permalink | 0 comments
seems expensive
whats wrong with stm32 + eth ic
oh neat, stm32f1 and up have ethernet
Posted by renesis at 08:01 | permalink | 0 comments
rab: what does fake a penalty ten mean
i feel like maybe i can go to china and teach comma, and make millions
Posted by renesis at 07:51 | permalink | 0 comments
yeah ive gotten it kicked back for that
usually because inches instead of mm
Posted by renesis at 06:57 | permalink | 0 comments
yeah they figure shit out
like mirrored layers and shit
if its not obvious, theyll kick it back or ask for help
definitely
thats what freedfm.com is
i wont use the board house that it quotes to, but as a DFM check, its great, and def fully automated
im always hitting that shit at like 3am
my workflow is basically check at freedfm.com, sometime click through to the quotes page and laugh, then start quoting the files elsewhere
freedfm outputs PDFs of each layer
prob just deleted it and drew in the square
anyway, if there is a board outline, matching on both silk layer, they will probably just go with that as edge
Posted by renesis at 06:52 | permalink | 0 comments
eagle?
scramble up your boards
it would also let you work without actually saving saves
wait no
so basically, you would open a board, work on it, and it would save
but when you tried to open it up again, it would pop up a dialog like, yo this is corrupt or made on an illegal copy of eagle
there were 'unlocker' tools by script kiddies, but half the time they would scramble up the board
so the biggest issue would be doing entire boards in one session, saving to file, then sending off the eagle files to a board house
Posted by renesis at 06:46 | permalink | 0 comments
?
i still dont understand
oh
am i gonna get juarez altium
no idea, id rather not
eagle trolls pirats hard
Posted by renesis at 06:40 | permalink | 0 comments
yup
oh
i didnt know you could do that
i just used the board editor thing
ya
because i have to copy or transcribe ro mech layer after
*to
yeah
damn i think my student license dies soon
Posted by renesis at 06:35 | permalink | 0 comments
ha, board outline is always kind of an after the fact thing
i just output the edge as a gerber and name it .edge, havent ever had an issue with a board house
if you put an outline in one of the silk layers, i think a lot of board houses just assume its the edge
like, freedfm.com i think just uses the limits of the different layers to decide an edge
i dunno if it pads it
im assuming because ive uploaded without the edge file, and it figures it out
Posted by renesis at 06:30 | permalink | 0 comments
he says switch closed for t>=0, calc i3 at t>=0
answer is an equation, not a value
least it would be for classes i took
sure he left that part out, he explained in comments
Posted by renesis at 06:13 | permalink | 0 comments
jero32: no freq is included so i would assume step function
at infiniti
switch closes at t=0
so yeah, its not steady state
he needs to calc the voltage across the cap as a function of time to solve
shrug, all time if the equation is correct
do some KVL, laplace that shit, shrug
a specific current can be an equation, in this case, it sounds like it is
Posted by renesis at 06:08 | permalink | 0 comments
its like they took all their bad bently modules and put them into one car
Posted by renesis at 02:16 | permalink | 0 comments
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